Design for
Manufacturing – Quick tables of Interconnection/Wire-bond
Basics
1. Electric Current vs. Wire Size
2. Basics of Board, Substrate, Package, Flex
3. Gold Plating
4. Trace Attributes
Layout
5. Bond-Pad size on Die vs. Wire Size
6. Die Mounting-Pad Size vs. Die Size
7. Better Trace Layout
8. Geometry re Trace-End
9. Obstacle Position, away from the 2nd bond-point
Process
10.
Assembly Process Concerns
11.
Eutectic Attach and Epoxy Attach
12.
Mistakes & Advice on Board Preparation
13.
Assembly Issues and Answers
14.
Bond Variables
15.
Wire-Bond Quality Data
16.
Glob Top Encapsulation
Advance concern: Wire Inductance
17.
Principles of Wire Parasitics
18.
Inductance of 2 Wires
19.
Wire Inductance Calculation, Simplified
20.
Wire Length for Inductance Concern
21. Wire Inductance
Table & Calculation, Realistic
1. Electric Current vs. Wire Size
|
Material
|
Wire dia,
mil
|
Max. Amp
|
|
Length < 40 mil
|
0.1” > Length > 40 mil
|
|
Gold
|
0.7
|
0.556
|
0.380
|
|
Gold
|
1.0
|
0.949
|
0.648
|
|
Alum
|
0.7
|
0.407
|
0.208
|
|
Alum
|
1.0
|
0.696
|
0.481
|
|
Alum
|
2.0
|
1.968
|
1.360
|
Calculation Info
|
Electrical
|
Alum
|
Gold
|
|
Specific Resistance, ρ
|
Ω
(mm
²)/ M
|
0.0278
|
0.0222
|
|
Specific conductance,
η = 1/ρ
|
M /
Ω (mm
²)
|
36
|
45
|
|
Maximum current in
DC amperes or rms AC ampers
I max = K d
³/²,
d =
wire dia. in
|
K
|
Length
< 40 mil
|
22,000
|
30,000
|
|
Length
> 40 mil
|
15,200
|
20,500
|
2. Basics of Board, Substrate, Package, Flex
|
|
Board,
FR-4 PCB
|
Substrate,
Thick Film
|
Packages,
Metal
|
Flex
|
|
Base Material
|
FR-4
(Epoxy)
|
Al2O3
(Ceramics)
|
Kovar,
Fe52Ni29Co18
|
Polyimide (Kapton);
Polyester (Mylar)
|
|
Conductor
|
Cu + Ni +
Au plating
|
Au, PdAg, PdPtAg, Cu
|
|
Cu + Ni +
Au plating
|
|
Dielectrics
|
Epoxy, FR-4
|
Glass-Ceramics
|
Glass-Ceramics
|
Kapton;
Mylar
|
|
Fabrication
Processes
|
Photolithography, etch, collate, sheets, laminate, Drill vias, plate
|
Sequentially print, dry, afire conductor, dielectric, and resistor pastes
|
machining
|
Photolithography, etch, collate, sheets, laminate, Drill vias, plate
|
|
Line width,
um, min
|
75
|
125
|
|
75
|
|
Via dia, um min
|
200
|
250
|
|
<200
|
|
Conductor Resistance, mW/sq
|
0.15~1
|
2-100
|
|
0.15~1
|
|
CTE (or TCE), ppm/8C
|
4~16
|
4~7.5
|
5.5
|
18
|
|
Thermal conductivity,
W/m@K
|
low
|
Much higher
|
16.5 W/m.C @25C;
17.6 W/m.C
@ 100C
|
low
|
|
Tolerance to temp extremes
|
Low
|
High
|
|
Low
|
|
Relative cost
|
Low
|
High
|
High
|
Low
|
3 Gold Plating
3.1 Over copper on Board, IPC-4552,
|
1st level
|
Ni
|
150 ~ 200 micro inches nickel over copper clad PCBs
|
|
2nd level
|
Au
|
5 ~ 15 micro inches malleable, 99.99% pure gold, over nickel.
|
3.2 Commercial Plastic Package, e.g. PBGA
|
1st level
|
Ni
|
50 micro inches min.
|
|
2nd level
|
Au
|
20 micro inches min.
|
3.3 Ceramic Package, e.g. Kyocera’s C-DIP
|
1st level
|
Ni
|
60 ~ 350 micro inches
|
|
2nd level
|
Au
|
60 ~ 225 micro inches
|
3.4 Substrate, Thick film
|
Au
|
400 micro inches, Stencil printed
|
4. Trace Attributes
|
Material
|
Die
Bondability
|
Wire
bondability
|
Solder-ability
|
Corrosion
resistance
|
|
Eutectic
|
Epoxy
|
Gold
|
Alum
|
|
Au
|
good
|
excellent
|
excellent
|
good
|
per solder type
|
excellent
|
|
PdAu
|
NG
(no good)
|
excellent
|
Fair
to poor
|
fair
|
good
|
excellent
|
|
PdAg
|
NG
|
excellent
|
good
|
good
|
good
|
good
|
|
PdPtAg
|
NG
|
excellent
|
good
|
good
|
good
|
good
|
|
Cu
|
NG
|
excellent
|
fair
|
fair
|
excellent
|
poor
|
|
Ni
|
NG
|
excellent
|
NG
|
NG
|
NG
|
excellent
|
|
W
|
NG
|
excellent
|
NG
|
NG
|
NG
|
good
|
5. Bond-Pad size on Die vs. Wire Size
|
Pad Size,
mil x mil
|
Min.Pad-Pitch, mil
|
Wire dia, mil
|
|
Side
|
Corner
|
|
4 x 4
|
5
|
6
|
>=1.0
|
|
3 x3
|
4
|
5
|
1.0
|
|
2.6 x 3
|
3.5
|
4.5
|
1.0 or 0.7
|
|
2.0 x 2.4
|
2.5
|
3.5
|
0.7
|
6. Die-Mounting-Pad Size vs. Die Size
Die-mount-pad (A x B) vs. Die size (dl x w)
|
Comply with
MIL-STD-883
|
A x B > =
|
(dl + 8 x 2 mil) x (w + 8 x 2 mil)
|
|
Don’t care
MIL-STD-883
|
A x B =
|
dl x dw
|
7. Better Trace Layout
Trace-end Layout
|
Uniform & even
|
staggered
|
hoe
|
|
Better, if
|
They are parallel to
the bond-pad of each side of die
|
|
Use stagger way
to narrow the trace pitch
|
|
Apply the hoe shape
at the trace end
|
|
Avoid
|
To wire trace and die-pad in big angle,
e.g. corner wires and angle wires
|
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